Introduction

This brief presents a Fast  Fourier Transform (FFT)design using Vedic mathematics with high speed, low power and small area. Historically, this has been a relatively difficult function to implement optimally in hardware leading many software designers to use digital signal processors in soft implementations. Vedic Mathematics is the ancient system of mathematics which has a unique technique of calculations based on 16 Sutras. Urdhava Triyakbhyam algorithm of Vedic Mathematics is utilized to improve its efficiency and Nikhilam algorithm with the compatibility to different data types. By using Vedic multiplier we can save 40% more area ,50% power and 13% less delay so we can increase speed of FFT.